Chanki Kim
- POSITION
- Assistant Professor
- Reserach Area
- 컴퓨터시스템
- carisis(at) jbnu.ac.kr
- Ph.D
- LAB
학력
서울대학교 전기정보공학부 공학사(2009.03-2013.02)
서울대학교 전기컴퓨터공학부 공학박사(2013.03-2019.02)
서울대학교 전기컴퓨터공학부 공학박사(2013.03-2019.02)
경력
삼성전자 Staff Engineer(2019.03-2019.12)
한국과학기술정보연구원 선임연구원(2019.12-2021.03)
한국과학기술정보연구원 선임연구원(2019.12-2021.03)
주요 연구실적
<최신 국제 저널>
1. Chanki Kim, Young-Sik Kim, and Jong-Seon No, "New design of blockwise interleaved ideal low-rank parity-check codes for fast post-quantum cryptography," accepted for publication in IEEE Communications Letters, March 2023.
2. Chanki Kim, Jae-Won Kim and Jong-Seon No, "New design of error control codes resilient to single burst error or two random bit errors using constacyclic codes," IEEE Access, vol. 10, pp. 131101-131108, December 2022.
3. Jaewha Kim, Chanki Kim, Hosung Park, and Jong-Seon No, “Design of protograph LDPC codes using resolvable block design for block fading channel,“ IEEE Wireless Communications Letters, vol. 11, Issue 9, September 2022.
4. Chanki Kim and Jong-Seon No, “New design and analysis of error-resilient LRCs for DSSs with silent disk errors,” IEEE Access, vol. 9, pp. 124463-124477, December 2021.
5. Chanki Kim, Sang-Hyo Kim, and Jong-Seon No, ``New GRP LDPC codes for H-ARQ-IR over block fading channels,'' IEEE Transactions on Communications, vol. 68, no. 11, pp. 6642-6656, November 2020.
<최신 국제 특허>
1. Kijun Lee, Chanki Kim, Sunghye Cho, and Myungkyu Lee, ``MEMORY CONTROLLERS AND MEMORY SYSTEMS INCLUDING THE SAME’’, US Patent, No. US11088710, Aug. 10, 2021
2. Sunghye Cho, Kijun Lee, Yeonggeol Song, Sungrae Kim, Chanki Kim, Myungkyu Lee, and Sanguhn Cha, ``ERROR CORRECTION CIRCUIT OF SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE’’ US Patent, No. US11106535, Aug. 31, 2021
3. Hoyoun Kim, Kijun Lee, Chanki Kim, Myungkyu Lee, `` MEMORY CONTROLLERS, MEMORY SYSTEMS AND MEMORY MODULES” US Patent, US11392454, Jul. 19, 2022
4. Sunghye Cho, Chanki Kim, Kijun Lee, Sanguhn Cha, and Myungkyu Lee, ``SEMICONDUCTOR MEMORY DEVICES AND MEMORY SYSTEMS WITH ENHANCED ERROR DETECTION AND CORRECTION’’. ” US Patent, US11416335, Aug. 16, 2022
5. Sungrae Kim, Kijun Lee, Myungkyu Lee, Sunghye Cho, Chanki Kim, and Yeonggel Song, ``MEMORY CONTROLLERS AND MEMORY SYSTEMS INCLUDING THE SAME’’, US Patent, US20210194508, Oct. 04 2019.
<참여 과제>
1. NRF, "Ultra-low latency ECC design for latency-sensitive applications in the future ICT environments", Sept. 2021-Mar. 2024
2. IITP, "Development of Highly Efficient PQC Security and Performance Verification for Constrained Devices", Apr. 2021-Dec. 2023.
3. Samsung Electronics, "Low Latency Design of Error Correcting Codes for Ultra-High Speed Chip Interconnect", Jun, 2021-Jun. 2023.
1. Chanki Kim, Young-Sik Kim, and Jong-Seon No, "New design of blockwise interleaved ideal low-rank parity-check codes for fast post-quantum cryptography," accepted for publication in IEEE Communications Letters, March 2023.
2. Chanki Kim, Jae-Won Kim and Jong-Seon No, "New design of error control codes resilient to single burst error or two random bit errors using constacyclic codes," IEEE Access, vol. 10, pp. 131101-131108, December 2022.
3. Jaewha Kim, Chanki Kim, Hosung Park, and Jong-Seon No, “Design of protograph LDPC codes using resolvable block design for block fading channel,“ IEEE Wireless Communications Letters, vol. 11, Issue 9, September 2022.
4. Chanki Kim and Jong-Seon No, “New design and analysis of error-resilient LRCs for DSSs with silent disk errors,” IEEE Access, vol. 9, pp. 124463-124477, December 2021.
5. Chanki Kim, Sang-Hyo Kim, and Jong-Seon No, ``New GRP LDPC codes for H-ARQ-IR over block fading channels,'' IEEE Transactions on Communications, vol. 68, no. 11, pp. 6642-6656, November 2020.
<최신 국제 특허>
1. Kijun Lee, Chanki Kim, Sunghye Cho, and Myungkyu Lee, ``MEMORY CONTROLLERS AND MEMORY SYSTEMS INCLUDING THE SAME’’, US Patent, No. US11088710, Aug. 10, 2021
2. Sunghye Cho, Kijun Lee, Yeonggeol Song, Sungrae Kim, Chanki Kim, Myungkyu Lee, and Sanguhn Cha, ``ERROR CORRECTION CIRCUIT OF SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE’’ US Patent, No. US11106535, Aug. 31, 2021
3. Hoyoun Kim, Kijun Lee, Chanki Kim, Myungkyu Lee, `` MEMORY CONTROLLERS, MEMORY SYSTEMS AND MEMORY MODULES” US Patent, US11392454, Jul. 19, 2022
4. Sunghye Cho, Chanki Kim, Kijun Lee, Sanguhn Cha, and Myungkyu Lee, ``SEMICONDUCTOR MEMORY DEVICES AND MEMORY SYSTEMS WITH ENHANCED ERROR DETECTION AND CORRECTION’’. ” US Patent, US11416335, Aug. 16, 2022
5. Sungrae Kim, Kijun Lee, Myungkyu Lee, Sunghye Cho, Chanki Kim, and Yeonggel Song, ``MEMORY CONTROLLERS AND MEMORY SYSTEMS INCLUDING THE SAME’’, US Patent, US20210194508, Oct. 04 2019.
<참여 과제>
1. NRF, "Ultra-low latency ECC design for latency-sensitive applications in the future ICT environments", Sept. 2021-Mar. 2024
2. IITP, "Development of Highly Efficient PQC Security and Performance Verification for Constrained Devices", Apr. 2021-Dec. 2023.
3. Samsung Electronics, "Low Latency Design of Error Correcting Codes for Ultra-High Speed Chip Interconnect", Jun, 2021-Jun. 2023.